VTU Electronics and Communication Engineering (Semester 7)
Embedded System Design
December 2014
Total marks: --
Total time: --
INSTRUCTIONS
(1) Assume appropriate data and state your reasons
(2) Marks are given to the right of every question
(3) Draw neat diagrams wherever necessary


1 (a) Explain:
i) Embedded system
ii) Hard RTS
iii) Watch dog timer
6 M
1 (b) With a block diagram, explain briefly the various components in a microprocessor based embedded system.
7 M
1 (c) Briefly describe the major elements of the embedded system development life cycle.
7 M

2 (a) Explain direct and register indirect addressing modes with diagram. Also write the timing diagram for serial write operation with an 8 bit register.
6 M
2 (b) Compare:
i) Big-Endian and little-Endian formats:
ii) RISC and CISC registers
iii) Truncation and rounding errors.
6 M
2 (c) Explain the direct mapping cache management strategy with an example. What are the trade off between write through and delayed write algorithm?
8 M

3 (a) Explain the internal diagram of SRAM and write timing diagram for read operation.
6 M
3 (b) Write the inside and outside diagrams for DRAM along with read and write operations.
8 M
3 (c) Explain Associative mapping cache implementation.
6 M

4 (a) Write the flow diagrams for waterfall and V life cycle models and briefly explain waterfall steps.
6 M
4 (b) Write a hardware architecture and data and counter flow diagram of a counter system and explain briefly flow diagram.
8 M
4 (c) Explain the characterizing and identifying the requirements of a system, with respect to a digital counter.
6 M

5 (a) Discuss task control block. Mention some of the major components of task control block.
5 M
5 (b) Differentiate between:
i) Program and process
ii) Processes and threads
iii) Light weighted and heavy weighted threads.
6 M
5 (c) Explain the different functions of embedded operating.
9 M

6 (a) Discuss foreground / background system. Mention the difference between foreground and background task.
6 M
6 (b) Describe virtual model and high level model for OS architectures.
6 M
6 (c) Write the algorithm for a simple OS kernel, using C language notation for 3 asynchronous tasks using TCB's only. The 3 tasks use a common data buffer for read, increment and display operations.
8 M

7 (a) Write the Amdahl's limitation for performance improvement / optimization. Consider a system with the following characteristics. The task to be analysed and improved currently executes in 100 time units, and the goal is to reduce execution time to 50 units, the algorithm to be improved uses 40 time units. Determine the unknown parameter and write the interface:
6 M
7 (b) Describe the methods by which we can perform a time coding analysis of an embedded a time coding analysis of an embedded application. Discuss the advantages and disadvantages of each.
8 M
7 (c) Write 'C' functions to determine the sum of the elements in an array and analyze it line by line for its time complexity.
6 M

8 (a) Describe memory loading with equation, figure and an example.
8 M
8 (b) Write short notes on the following:
i) Tricks of the trade
ii) Performance optimization.
12 M



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