STUPIDSID
1(a)
Derive the expression of iD - VDS relationship for triode and saturation region of a NMOS transistor.
10 M
1(b)
For the MOSFET with \( \dfrac{W}{L}=\dfrac{8\mu m}{0.8\mu m}\)/, calculate the values of VGS and VDS(min) needed to operate the transistor in the saturation region with a dc current ID = 100. Assume K'n = 194 μA/V2 and V1 =0.7 V.
5 M
1(c)
Write the expression for the relationship between VSB and Vt. Mention the effect of VSB on the channel.
5 M
2(a)
What are the benefits of short channel MOSFETs?
6 M
2(b)
Explain the operation of a MOSFET current mirror.
6 M
2(c)
Draw the circuit of a MOS current steering circuit and explain it.
8 M
3(a)
Explain CMOS implementation of the common source amplifier and also draw its i-v characteristic of the active load and transfer characteristic.
10 M
3(b)
Consider a common gate amplifier specified as follows :
\( \dfrac{W}{L}=\dfrac{7.2\mu m}{0.36\mu m}\)/, μn Cox=387 μA/V2,γ0=18 KΩ,ID=100μA, gm=1.25 mA/V,X=0.2, Rs = 10KΩ, RL,=100 KΩ, Cgs = 20 fF, Cgd=5 fF and CL=0. Find Avo, Rin, Rout, Gv, Gis, Gi and fH.
\( \dfrac{W}{L}=\dfrac{7.2\mu m}{0.36\mu m}\)/, μn Cox=387 μA/V2,γ0=18 KΩ,ID=100μA, gm=1.25 mA/V,X=0.2, Rs = 10KΩ, RL,=100 KΩ, Cgs = 20 fF, Cgd=5 fF and CL=0. Find Avo, Rin, Rout, Gv, Gis, Gi and fH.
10 M
4(a)
What is cascade amplifier? Mention the basic idea behind it.
4 M
4(b)
Derive the expression of voltage gain and open circuit voltage gain of a IC-source follower. Draw its small signal equivalent circuit model.
8 M
4(c)
Explain the operation of a MOS different pair with common-mode input voltage.
8 M
5(a)
Explain the operation of a two-stage CMOS op-amp configuration. Mention its features.
10 M
5(b)
Illustrate the methods of differential to single-ended conversion.
7 M
5(c)
What are the factors contribute to the de offset voltage of the MOS differential pair?
3 M
6(a)
Discuss the properties of negative feedback in details.
8 M
6(b)
Explain the relationship between stability and pole location of an amplifier with effects.
6 M
6(c)
Draw the block diagram, representation of a series-shunt feedback amplifier an derive the expression of input resistance with feedback.
6 M
7(a)
Design a non-inverting amplifier with a gain of 2, At the maximum output voltage of 10 V and the current in the voltage divider is to be 10 μA.
5 M
7(b)
With a mathematical analysis and circuits, explain the temperature effects in Logarithmic amplifier are to be minimized.
9 M
7(c)
Draw the sample and hold circuit using op-amp and explain it.
6 M
8(a)
Define the following parameters of a logic circuit family and write the expression: i) Prpagation delay.
ii) Robustness
iii) Delay-power product
iv) Dynamic power dissipation.
ii) Robustness
iii) Delay-power product
iv) Dynamic power dissipation.
8 M
8(b)
Implement :
i) \(F=\overline{AB+CD} \)/ using the AND-OR-INVERT gate logic
ii) \(F=\overline {(A+B)(C+D)}\)using the OR-AND-INVERT gate logic.
i) \(F=\overline{AB+CD} \)/ using the AND-OR-INVERT gate logic
ii) \(F=\overline {(A+B)(C+D)}\)using the OR-AND-INVERT gate logic.
12 M
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